A Low-Cost Adaptive Ramp Generator for Analog BIST Applications
نویسندگان
چکیده
This paper presents a high-quality and area-efficient ramp generator to be used for on-chip testing of analog and mixed-signal circuits. An original adaptive scheme is developed to palliate the inaccuracy of a basic ramp generator. As a result, the proposed adaptive ramp generator exhibits very good performances in terms of slope precision and ramp linearity while maintaining a low area overhead.
منابع مشابه
∆∑ Modulation Based On-Chip Ramp Generator for ADC BIST
-Based on ∆∑ modulator, an on-chip analog ramp generator for ADC BIST (Built-in Self Test) is presented. Technique uses the over-sample and ∆∑ noise shaping to generate the on-chip precise analog ramp with the precise control of a calibrator of ramp slope. Moreover, because of over-sample and ∆∑ noise shaping, the design of analog circuits is simplified, and is tolerant to the mismatch of techn...
متن کاملA 65nm CMOS Ramp Generator Design and its Application Towards a BIST Implementation of the Reduced-Code Static Linearity Test Technique for Pipeline ADCs
This work presents an efficient on-chip ramp generator targeting to facilitate the deployment of Built-In Self-Test (BIST) techniques for ADC static linearity characterization. The proposed ramp generator is based on a fully-differential switched-capacitor integrator that is conveniently modified to produce a very small integration gain, such that the ramp step size is a small fraction of the L...
متن کاملOn-Chip Ramp Generators for Mixed-Signal BIST and ADC Self-Test
A practical approach to generate on-chip precise and slow analog ramps, intended for time-domain analog testing, monotonicity and histogram-based tests of ADCs is proposed. The technique uses an analog discrete-time adaptive scheme to calibrate the ramp generator. The lowest slope is 0.4 V/ms. Three implementations are presented for different levels of accuracy and complexity. Measurement resul...
متن کاملA Low-Cost BIST Based on Histogram Testing for Analog to Digital Converters
In this letter a histogram-based BIST (Built-In Self-Test) approach for deriving the main characteristic parameters of an ADC (Analog to Digital Converter) such as offset, gain and non-linearities is proposed. The BIST uses a ramp signal as an input signal and two counters as a response analyzer to calculate the derived static parameters. Experimental results show that the proposed method reduc...
متن کاملRef: BC.MEJ-IMST01.2 Analog Built-In Saw-Tooth Generator for ADC Histogram Test
This paper presents an analog built-in saw-tooth generator to be used for linear histogram test of ADCs. The internal generation of a highly linear signal with precise amplitude control relies on the use of an original calibration scheme. The effectiveness of the calibration procedure is evaluated through simulations and results demonstrate that ramp signals with a linearity of 15 bits and an a...
متن کامل